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IWLPC 2015 IWLPC 2015 Closed Interconnecting WLP, MEMS & 3D Integration Dates: Tuesday, October 13, 2015 - Thursday, October 15, 2015 Venue: DoubleTree San Jose Airport Hotel, San Francisco CA, United States SMTA and Chip Scale Review are pleased to announce the 12th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging. Website: http://www.iwlpc.com/ Venues DoubleTree by Hilton Hotel San Jose 2050 Gateway Place, San Jose, California, 95110, San Jose CA United States Tel: +1-408-453-4000 http://doubletree.hilton.com/ Organizers Surface Mount Technology Association (SMTA) 5200 Willson Road, Suite 215, Edina, MN 55424, Minneapolis United States Tel: +1-952-920.7682 http://www.smta.org/ Future Dates: IWLPC 2016 10/18/2016 - 10/20/2016 San Francisco CA, United States IWLPC 2018 10/23/2018 - 10/25/2018 San Francisco CA, United States Wafer-Level Packaging Symposium 2023 2/14/2023 - 2/16/2023 San Francisco CA, United States Wafer-Level Packaging Symposium 2026 2/17/2026 - 2/19/2026 San Francisco CA, United States Wafer-Level Packaging Symposium 2027 2/9/2027 - 2/11/2027 San Francisco CA, United States Wafer-Level Packaging Symposium 2028 San Francisco CA, United States Previous Dates: Related Events: Electronics for Extreme Environments 2026 6/30/2026 - 7/1/2026 Cambridge, United Kingdom IMAPS CHIPcon 2026 7/6/2026 - 7/9/2026 San Jose CA, United States Chip in Sampa 2026 8/24/2026 - 8/28/2026 Sao Paulo, Brazil IICIE 2026 9/9/2026 - 9/11/2026 Shenzhen, China IMAPS Poland & COE 2026 9/20/2026 - 9/23/2026 Bukowina Tatrzanska, Poland More Events ...